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We are using MSP430F6723 , and we want to achieve 20 uA of current consumption. There is a problem with hardware SPI. SMCLK doesn't stop after reading from SPI is finished. If I'm not mistaken, it doesn't stop if UCBUSY = 1. I don't care about UCBUSY behavior, but I have huge additional current cons...
- Fri Apr 06, 2018 1:09 am
- Forum: Software
- Topic: Could you help me with this timing errors please?
- Replies: 0
- Views: 263
Hi guys, While playing around with the verilog code I came across various timing errors, some right out of the box, some popping up after making the slightest changes. I forgot to write down what kind of errors (setup/hold) these were, but here goes: Timing errors at the digital loop mux: After read...